a. Field of the Invention
The present invention pertains to tools used for analyzing integrated circuits during design and specifically to tools for simulating the contact resistance of resistors in integrated circuits.
b. Description of the Background
Integrated circuits are commonplace in electronics of all sorts since many types of electrical devices can be combined into a single part. These devices may include capacitors, transistors, resistors, and many other devices.
The processes used to fabricate integrated circuits, including the materials and manufacturing steps, are continually being updated and changed. When a new generation of manufacturing processes is planned, it is common to set specific performance characteristics prior to successfully fabricating an integrated circuit using the new manufacturing processes. The purpose of setting the performance characteristics is to allow the design of new integrated circuits to proceed using the planned performance characteristics so that the new designs would be compatible with the new manufacturing processes.
Typically, the new process development and a new integrated circuit design may occur over many months. Some aspects of the performance of a new integrated circuit may not be fully characterized until the manufacturing process is actually executed and tuned. A delay in the characterization of an element may mean that a design may have to be changed after the manufacturing process is tuned and understood. This delay may cause many man-hours of work and may also delay the release of a new product.
The contact resistance between a metal trace and a resistor is an element that has heretofore been poorly estimated during the development of the manufacturing process. It has only been properly characterized after development of the manufacturing process. After the manufacturing process is completed, empirical measurements are taken to determine the resistance of this region, and the design is modified to operate with the empirical measurements.
It would therefore be advantageous to provide a system and method for simulating the contact resistance between a metal trace and a resistor in an integrated circuit that may be used during the design of an integrated circuit. It would be further advantageous to provide a system and method for simulating the contact resistance between a metal trace and a resistor in an integrated circuit that uses manufacturing process performance characteristics as input, so that designs using the simulation could be created that closely match the actual performance of the manufactured integrated circuit.
The present invention overcomes the disadvantages and limitations of the prior art by providing a system and method that accurately determines the resistance of a contact region of an integrated circuit. The system and method use target process performance specifications so that accurate simulations of the contact region may be made prior to obtaining empirical data, thus making design simulations more accurate for integrated circuits being designed for processes that are still under development. Further, many different geometries of the contact region are handled with the function.
The present invention may therefore comprise a simulation program of the contact region for a resistor of an integrated circuit wherein an array of contacts are used to connect a metal trace to a resistor element comprising: a contact resistance value representing the resistance of the contacts; a metal resistance value representing the resistance of the metal trace; a resistor resistance value representing the resistance of the resistor element; and a function having inputs comprising: the contact resistance, the metal resistance, the resistor resistance, and the number of rows of contacts, the function generated by the process of determining at least two values that define the ranges of resistance for the contact resistance, the metal resistance, and the resistor resistance, calculating the total resistance for each combination of the values of resistance, and performing a regression analysis on the calculated values of the total resistance for the combinations of values of the resistance.
The present invention may further comprise a method of generating a function to represent the resistance of the contact region of an integrated circuit resistor comprising: determining at least two values that define the range of resistance for contact resistance representing the resistance of a contact; determining at least two values that define the range of resistance for metal resistance representing the resistance of a metal trace; determining at least two values that define the range of resistance for resistor resistance representing the resistance of a resistor element; determining at least two different geometries of the contact region; calculating the total resistance for each combination of the values of resistance and the geometries; performing a regression analysis on the calculated values of the total resistance for the combinations of values of the resistance and the geometries; and forming a function from the regression analysis to calculate the total resistance, the function having inputs comprising the resistances and the geometries.
The present invention may further comprise an integrated circuit having been designed with a process comprising: generating a schematic of the integrated circuit comprising at least one resistor, the resistor comprising at least one contact region; performing a simulation of the performance of the integrated circuit using the schematic and using a function to determine the resistance of the contact region, the function having inputs comprising: a contact resistance defining the resistance of a contact within the contact region, a metal resistance defining the resistance of a metal trace, a resistor resistance defining the resistance of the resistive region, and the number of rows of contacts, the function generated by the process of determining at least two values that define the ranges of resistance for the contact resistance, the metal resistance, and the resistor resistance, calculating the total resistance for each combination of the values of resistance, and performing a regression analysis on the calculated values of the total resistance for the combinations of values of the resistance and the number of rows; and changing at least one portion of the schematic based on the simulation.
The advantages of the present invention are that accurate values of the resistance of a contact region are found using a single function for a variety of contact region geometries. Further, the function uses parameters that are known prior to empirically testing a manufacturing process that may be under development. This allows designs to be completed contemporaneously with the development of a manufacturing process.